1. Field of the Invention
The present invention generally relates to computer-implemented methods, computer-readable media, and systems for classifying defects detected in a memory device area on a wafer. Certain embodiments relate to classifying defects detected in a memory device area on a wafer based on positions of the defects within the different types of blocks in the memory device area in which the defects are located.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Memory devices such as DRAM and Flash memory include repeating blocks (e.g., memory cell block, sense/amplifier block, wordline driver block, conjunction, and others). More than about 80% of memory devices can be occupied by a memory cell block. The memory cell block includes repeating structures. For example, the memory cell block may include 2 F˜8 F repetitive structures having the same pattern background.
Currently used methods for classifying defects include using the design background or defect attributes to classify the detects. One such method for classifying defects is design based binning (DBB). Examples of DBB are described in commonly owned U.S. patent application Ser. No. 11/561,659 by Zafar et al., published as U.S. Patent Application Publication No. 2007/0288219 on Dec. 13, 2007, which was filed on Nov. 20, 2006, and which is incorporated by reference as if fully set forth herein. DBB, in general, can be described as pattern based binning that may use graphical data stream (GDS) clips. For example, DBB may include extracting design clips corresponding to locations of defects detected on a wafer, comparing the clips against themselves, and binning the defects into groups such that the clips for the defects in each of the groups are substantially the same. Therefore, defects having the same pattern background are classified into the same bin. DBB may also include generating results such as a pareto chart showing the number of defects in each of the pattern based groups. In addition, DBB can involve using design and inspection information to identify and classify potential systematic pattern problems.
However, memory blocks have repeating structures, which means that the design background provides little or no differentiation for defects as design rules continue to shrink. In particular, since defects in memory device areas will in general have the same pattern background, DBB does not provide differentiation among different defects because different defects will have the same pattern background and will thereby be binned into the same group. In this manner, for memory devices, it is not helpful to use the design background for defect classification. Therefore, although DBB methods and systems have proven to be extremely useful in a number of applications, DBB is difficult to use for memory devices. In particular, DBB will have substantially limited use for DRAM and Flash memory devices.
Accordingly, it would be advantageous to develop more effective methods and systems for classifying defects detected in a memory device area on a wafer.